| Building upon the many power management technologies
in the previous Reference Flows, Reference Flow 7.0 provides designers with more powerful
features to drive down power consumption in 65nm.
Dynamic power reduction improvements include an enhanced voltage island implementation
and multi-corner timing closure helping customers to analyze the impact that voltage
scaling has on timing and to achieve timing closure.
Leakage power is addressed through a much-anticipated coarse-grained power gating technique,
which helps designers achieve the leakage reductions of up to two orders to magnitude.
An important element of any complete power management methodology is the integration
of libraries and design methodologies. Starting from Reference Flow 4.0, TSMC provides
a set of specially designed libraries with multiple threshold voltages to work with a
unique design methodology. For Reference Flow 7.0, TSMC provides a new level shifter cell
for voltage scaling, providing substantial area saving. In addition, an optimized
coarse-grained switching cell is designed to prevent electromigration, minimize voltage drop,
and ensure fast wake-up time.
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