Hidden beneath constant discussion of industry-leading advanced technology and manufacturing capacity, few may have noticed that TSMC is also home to one of the world's largest in-house mask shops. As process technology challenges become more complex, equipment costs become more daunting and time-to-market becomes more critical, mask services have become an increasingly critical factor in foundry selection. Photolithography and mask technology development are integral parts of the more than $300 million annual TSMC R&D budget and represent an investment affordable only by a few top-tier semiconductor companies. Supporting strong in-house photolithography and mask technologies creates a clear differentiation between TSMC and others in the dedicated foundry industry.

At the heart of TSMC's mask techology is optimizing wafer quality, anufacturability and yield at all process nodes. In fact, mask considerations are taken into account long before version 0.1 design rules are released for any new process technology. They are a critical part of the manufacturability equation that is factored into every new process technology rollout. As features get smaller, optical proximity correction (OPC) and phase-shift masks (PSM) have become essential for critical layers of 0.18-micron technology and below. To be effective at this node and beyond, the OPC model, mask writer, wafer scanner and process window must be considered as a whole.

Tape-out to mask-include OPC and mask making

TSMC's lithography team accurately simulates and predicts the weak points in this stream and precisely corrects for them. The team also invests substantial effort to integrate all facets of the mask making-to-lithography processes. Iterations of model simulation, mask writing and wafer level verification require an effective flow to shorten cycle time. TSMC has a very efficient process flow in order to deliver one-half the typical industry-standard mask cycle time.

Even after all of this effort, TSMC takes the responsibility for wafer yield losses traced to mask defect in its on-going effort to make high yields a top manufacturing priority. TSMC's in-process quality control system calls for routine mask inspection for particles, ESD damages, scratches, pellicle frame and precipitation inside pellicle. Necessary repair, replacement and cleaning are accomplished early on without interrupting wafer production. Despite the number of times that mask repair, cleaning or replacement occurs, the mask price includes the lifetime charge for these services. In-house mask technology has becoming increasingly more important as device design capitalizes on deeper and deeper sub-micron process technologies. A strong foundry in-house mask service can easily make the difference between a design's technical and business success, and offers scores of technical and business benefits for far-sighted enterprises, including:

	Reduced cycle time
	Process tuned OPC
	Process tuned mask writing
	Line-width and defect control
	In-process inspection
	Timely and cost-effect mask repair and maintenance services
	Mask protection Streamlined logistics

| | | | | | | |