Recent financial and technology reports strongly indicate that after a somewhat inauspicious start, TSMC is now successfully ramping its 0.13-micron process technology. In it's January conference call with the worldwide semiconductor financial analyst community,TSMC announced that its 0.13-micron process technology accounted for eight percent of fourth quarter 2002 revenues and provided guidance that this process node would account for 20% 2003 revenues. The company also reports more than 200 customer product tape-outs, the most in the foundry industry. Acknowledging that the 0.13-micron technology ramp has been no easy task for the entire semiconductor industry, TSMC has, over the past year, invested tremendous effort to resolve some highly complex issues inherent in 0.13-micron mass production. In retrospect, much of the required effort should not have come as a surprise, given the process node's fine features, all-layer copper interconnect and FSG low-k inter-metal dielectric materials. Moving into the first quarter, TSMC is shipping over 10,000 0.13-micron wafers per month with stable yields at reasonably high volumes reported for the general purpose, low voltage and low power technologies. As with any ramp-ing technology, yields are expected to steadily improve over the course of the year. Wafer cycle time has also shown continuous improvement, in tandem with manufacturing maturity. Virtually all of the 0.13-micron shipped wafers have utilized an FSG intermetal dielectric (IMD) material, which has a dielectric constant of 3.6. TSMC has also qualified 0.13-micron processes using low-k IMD (Black Diamond), which features a dielectric constant of 2.9. The Black Diamond process also differs from the FSG process in terms of other physical properties. During the early stages of qualification, TSMC confirmed that Black Diamond-based final packaged die reliability, especially flip-chip die, is highly dependent on packaging material consideration including, molding compound, under-fill, and solder; as well as die size. Over the past few months, the company has worked closely with packaging partners to the point that a select group of early customers are reporting that their packaged devices have passed strict qualification. Moving into 2003, TSMC has installed 0.13-micron 8-inch manufacturing capacity in Fab 6 and state-of-the-art 300mm Fab 12. Products taped out to Fab 12 are successfully demonstrating 300mm yields that match the 200mm yields in Fab 6. Looking to later in the year, Fab 12 will also roll out 90-nanometer production sometime early this summer.

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