TSMC Chemical Lab Gears Toward 65 Nanometers and Beyondn


  TSMC prepares for tomorrow's quality and reliability needs today to ensure the highest quality standards for the company's most advanced process technolgoies. The company's little known, but highly critical chemical laboratory is leading that charge.

TSMC's chemical lab includes a critical metrology center that measures minute trace levels of contaminants, such as metal impurities, down to one part-per-trillion (ppt) in 65-nanometer technology. This capability provides insight into the need for tighter specifications in advanced process control, rapid failure analysis, and the necessary corrective actions to ensure success at the 65-nanometer node and beyond.

Detecting ever-shrinking critical defects is one of the most difficult challenges for 65-nanometer technology yield enhancement. The ITRS 2003 update highlighted wafer environment contamination control (WECC) by requiring that ultra-pure water (UPW) be below one ppt in critical metals. This standard, which will become effective in 2007, represents the most aggressive 65-nanometer requirement for near-term impurity levels.

The one ppt level in water and chemical purification systems is not only difficult to achieve, but also to analyze. There are only a few advanced laboratories (TSMC being one of them) that can meet these challenges. As a result, the characterization of detrimental process defects may be very difficult at 65-nanometer technology and below.

Although the challenge is great, TSMC has been long preparing for these requirements.

 
Source: ITRS 2003 Table 114a

  As a result, TSMC's chemical lab is well-equipped to detect and monitor the ultra-trace contaminants, down to the sub-ppt level, at critical process steps in pre-diffusion cleaning and 193-nanometer immersion fluids.

 
  Advances at the lab - including the combination of High Resolution Inductively Coupled Plasma Mass Spectrometry (HR-ICP-MS) and Impinger-Ion Chromatography (Impinger-IC), the development of unique sample-preparation devices and the strictest laboratory practices such as Class-1 mini-environment - clearly demonstrate TSMC's promise to ensure contaminant-free wafer environments for advanced technologies.

 

Plasma ignition for detection of 1-ppt level metallic impurities in UPW at the Chemical Lab of TSMC (high-resolution ICP-MS)