We collectively achieve this success when joint engineering teams are focused on designing for manufacturability ... that is, designing to ensure that the margins and tolerances in their design match those of the semiconductor manufacturing process. It's a collaborative effort that requires coordination and communication.

Designing for manufacturability is a strategy that has been in existence for many years and is implemented to optimize return on investment or (ROI).

It would be easy to believe that designing for ROI is linked to the IC industry downturn. After all, when money is tight, it makes sense to design to older, less expensive processes. But even users of our most advanced technologies are designing for ROI, so there's more going on here than pure economics.

We think the ROI model reflects a more subtle, but profound, change in product planning that addresses a larger universe of issues.

The model for maximizing design ROI is a far more robust model that considers the true market potential of the product with all its benefits, in light of the cost of design, silicon, packaging, assembly, software development, IP licenses, marketing, distribution, and support. Most mportantly, designing for ROI considers the cost of making - or missing - a window of opportunity in a competitive business environment.

In sum, it's a measure of the product's potential profit margins.

Designing for ROI is not a do-or-die proposi-tion. There are always alternatives, but the alternatives have a direct impact not only on chip production, but also on product margins.

Maximizing ROI means making enlightened decisions about these alternatives. For instance, what is the foundry's track record with this technology? What are the tools used in the foundry's reference flow? Is the IP verified in silicon? Can the ball grid array I'm considering get me to volume production on time?

The trend toward designing for ROI seems to reflect a greater, and earlier, appreciation for the full range of costs and risks associated with new product development.

In an era when the cost of packaging is rapidly approaching the cost of silicon, and the cost of the hardware or packaged components is often equal to the cost of the chip, design for ROI only makes sense.