LSI Logic and Agere Systems recently announced product qualification and volume production using TSMC's 0.13-micron low-k process technology. To date, no other foundry has successfully qualified or mass-produced devices using low-k dielectric materials.

Agere claimed that its devices built using low-k materials have achieved up to a 20 percent performance gain, and a poten-tial 20 percent reduction in power con-sumption, comparing to competing chips. Copper inter-connect and low-k inter-metal dielectric (IMD) minimizes RC delay, which is increasingly important device feature.

TSMC earlier confirmed that the reliability of final packaged low-k manufactured die is highly dependent on packaging mater-ials such as molding compound, under-fill and solder, as well as die size. The company has worked closely with packaging part-ners ASE and Amkor and has indepen-dently established an identified group of materials combinations that are optimal for various packages. That two companies will contiune the development work with TSMC at 90-nm.

The ability to deliver a 0.13-micron process using copper and low-k dielectrics is a defining achievement in the semi-conductor industry. This success also bodes well for a successful transition to 90-nanometer technology, where low-k dielectrics will drive even greater performance differentiation.

The Agere and LSI Logic announcements are the latest in a string of 0.13-micron success stories that stretch back to mid-last year. Today, TSMC leads the foundry industry in 0.13-micron production, reporting over 100,000 wafers shipped, all with stable yields. To date, the majority of the company's 0.13-micron shipments have utilized FSG as the IMD. The company, however, expects significant low-k production volume in 2H03. In total, 0.13-micron production is expected to exceed 400,000 wafers and account for 20% of revenues this year.