Home > Dedicated IC Foundry > Services > Design Services > IP Alliance > TSMC9000 Program
TSMC9000 Program    
Technology
Manufacturing
Services
Design Services
IP Alliance
TSMC9000 Program
TSMC9000 IP Tag Specification
EDA Alliance
Design Center Alliance
Value Chain Aggregator
CyberShuttle®
Mask Services
Backend Services
eFoundry®
Open Innovation Platform®
Grand Alliance
TSMC9000, TSMC library and IP quality management program, aims to provide customer with consistent, simple way to review set of minimum quality requirements for libraries and IP designed for TSMC process technologies. The reviews can be viewed via TSMC-Online using your login info. TSMC9000 team monitors ongoing IP quality and its requirements are documented and constantly revised to keep IP quality requirements up-to-date. TSMC IP Alliance members submit required TSMC9000 data and silicon reports to TSMC for assessments. TSMC9000 assessment results are posted to TSMC-Online after review. Customers can see the assessment results and scores on TSMC-Online and understand the IP confidence level and/or risk level of using the IP for reference and judgment. Having these assessment results readily available can significantly shorten design Lead Time (L/T), which also lowers Total Cost of Ownership (TCO) of the entire SoC design process. Certification by TSMC9000 is one of the key requirements for acceptance to TSMC IP Alliance Program. The TSMC9000 requirements are described in the following documents:

TSMC9000, overall IP acceptance requirements and review procedure
Library9000, for standard cells, standard I/O and ESD IP
Memory9000, for SRAMs, register files, ROMs and CAMs
IP9000, for a wide diversity of IP, including eDRAM/1TRAM, electrical-fuse, specialty I/O, mixed-signal/analog IP, non-volatile memory IP and high-speed PHY IP
Soft-IP9000, for synthesizable IP based on an RTL implementation

TSMC works on Library/Memory/IP quality assessment with IP ecosystem partners according to the TSMC9000 requirements. There are seven assessments defined for hard IP, three of them for physical review, DFM compliance, and pre-silicon assessment of the design and are performed before test chip tape-outs. The pre-silicon assessment includes design kits and design margin reviews that are specific to a certain IP: two of them are typical and split lot silicon assessments which are related to test chip reports, and the others are IP Validation Center and volume production record. The IP Validation Center audits IP testing results by the TSMC test laboratory and all IP are monitored in volume production for issues.

Soft-IP9000, for synthesizable IP based on an RTL implementation, was created to extend TSMC9000 to cover Soft-IP. Based on the Soft-IP9000 requirements, two soft-IP quality assessments are done which include RTL code and physical implementation, and soft IP are monitored in volume production as well.

TSMC9000 Levels of Acceptance

TSMC 30th Anniversary Celebration Forum to be Webcast Live (2017/10/23)
   
TSMC Reports Third Quarter EPS of NT$3.47(2017/10/19)
   
Media Contacts

Open Innovation Platform®
Tech Symposiums, Trade Shows, Industry Events & Investor Meetings
TSMC Value Chain Aggregator
Business Contacts
Document Center
TSMC-Onlinenew window
Online information and transaction for our customers.
The web-based portal for smarter supplier interactions.
Member Login
Join TSMC member to get the latest press releases and financial reports.
Find more information about TSMC.
Open Innovation Platform® Home     Contact Us     Site Map     FAQ     Legal Notice & Trademark Information     Privacy Policy
Copyright© Taiwan Semiconductor Manufacturing Company Limited 2010-2017, All Rights Reserved.