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Wafer Level Chip Scale Package Services    
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TSMC's Wafer Level Chip Scale Package (WLCSP) portfolio meets the growing demand for fully integrated assembly and test solutions.

WLCSP services utilize industry-standard surface mount assembly techniques to achieve the many cost-saving benefits associated with other JEDEC standard area array packages. Current product applications include Bluetooth, WLAN, cellular RF, handset audio, UWB, mobile TV, power management IC, codec and touch screen controllers.


Parameter Specification
Technology Nodes C130 - N28
Si/Package Codesign Environment Yes
Testing Yes
Available Wafer Sizes 12"
Max. Chip Size (mm2) 52
Min. Ball Pitch (μm) 350
Mask Schemes 3-mask & 4-mask
Wafer Thickness (mil) ≥12
Min. Cu RDL width/space (μm) 10/10
Environmental Friendliness Yes
Service Scope Shuttle & Production
Product Applications Cellular RF, Wi-Fi, Codec, Bluetooth, GPS


TSMC WLCSP Service Benefits:

Time-to-Market
Early engagement that speeds advanced technology migration.
High Quality
TSMC controls its WLCSP process through the same quality standards in its world class wafer fabs.
Capacity Management
TSMC plans WLCSP capacity based on silicon demand to streamline finished goods planning and simplify supply chain logistics.
Fast Yield Feedback
Concurrent silicon-to-package engineering drives constant yield improvement data.

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