Home > Dedicated IC Foundry > Technology > Leading Edge Technology > 20nm Technology
20nm Technology    
Future R&D Plans
Leading Edge Technology
16nm Technology
20nm Technology
28nm Technology
40nm Technology
Advanced 12-inch Technology
More-than-Moore Technology
Application Specific Solutions
Open Innovation Platform®
Grand Alliance
TSMC's 20nm process technology can provide 30 percent higher speed, 1.9 times the density, or 25 percent less power than its 28nm technology. TSMC 20nm technology is the manufacturing process behind a wide array of applications that run the gamut from tablets and smartphones to desktops and servers.

The advanced 20nm technology demonstrates double digit 112Mb SRAM yield. The high performance device equipped with second generation gate-last HKMG and third generation Silicon Germanium (SiGe) strain technology. By leveraging the experience of 28nm technology, TSMC's 20nm process can further optimize Backend-of Line (BEOL) technology options and deep collaboration with customers to continue the Moores' Law shrinking path. Technology and design innovation keep production costs in check. In addition, multiple customers' IP have been verified on 20nm test chips.

Empowered by TSMC's Open Innovation Platform® (OIP) design ecosystem, designers can optimize their 20nm designs with qualified IP, design tools and methodologies, including flows for innovative patterning technology. Lithography techniques must change at the 20nm node to surmount inherent resolution challenges. TSMC has made this task transparent through our work and collaboration with leading EDA companies. The tools now support built-in technologies that comprehensively cover every design stage for designers to implement 20nm designs with minimum modifications to existing methodologies or flows.

TSMC is supporting both EDA vendors and IP suppliers with design enablement kits. These kits facilitate continuous improvement and interaction between designers, the foundry; and tool and IP suppliers to prepare the 20nm design ecosystem for production success.

The design ecosystem includes robust Design for Manufacturing (DFM) solutions, Process Design Kits (PDKs), foundry design rules, foundation library and IP, third-party IP, EDA tools, design reference flows and design services.
TSMC May 2017 Revenue Report(2017/06/09)
TSMC Sets July 2 as Record Date for Common Share Dividends(2017/06/08)
Media Contacts

Open Innovation Platform®
Tech Symposiums, Trade Shows, Industry Events & Investor Meetings
TSMC Value Chain Aggregator
Business Contacts
Document Center
TSMC-Onlinenew window
Online information and transaction for our customers.
The web-based portal for smarter supplier interactions.
Member Login
Join TSMC member to get the latest press releases and financial reports.
Find more information about TSMC.
Open Innovation Platform® Home     Contact Us     Site Map     FAQ     Legal Notice & Trademark Information     Privacy Policy
Copyright© Taiwan Semiconductor Manufacturing Company Limited 2010-2017, All Rights Reserved.