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TSMC became the first foundry to begin 65nm risk production in 2005 and passed product certification in the following year. The Company also introduced foundry's first 65nm Low Power (LP) process to meet customers' needs.

Following the 65nm LP process, TSMC quickly introduced a broad process portfolio that includes: general purpose (G), mixed signal/radio frequency (MS/RF), embedded DRAM memory (eDRAM), multi-time programmable non-volatile memory (MNVM), embedded flash memory (eFLASH), high voltage (HV), power management (BCD), and MEMS processes. The 65nm technology targets for a wide range of applications, such as mobile devices, computers, automotive electronics, IoT, and smart wearables.

TSMC's 65nm technology is the Company's third-generation semiconductor process employing both copper interconnects and low-k dielectrics. The technology supports a standard cell gate density twice that of TSMC's 90nm process. It offers better integration, improves chip performance and significantly reduces power consumption, with its innovative power management technology.

TSMC Chairman Dr. Morris Chang Honored by Forbes Magazine as One of the World’s 100 Greatest Living Business Minds(2017/09/21)
   
Xilinx, Arm, Cadence, and TSMC Announce World’s First CCIX Silicon Demonstration Vehicle in 7nm Process Technology(2017/09/11)
   
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