InFO (Integrated Fan-Out) Wafer Level Packaging

InFO is an innovative wafer level system integration technology platform, featuring high density RDL (Re-Distribution Layer) and TIV (Through InFO Via) for high-density interconnect and performance for various applications, such as mobile, high performance computing, etc.. The InFO platform offers various package schemes in 2D and 3D that are optimized for specific applications.

InFO_PoP, the industry's 1st 3D wafer level fan-out package, features high density RDL and TIV to integrate mobile AP w/ DRAM package stacking for mobile application. Comparing to FC_PoP, InFO_PoP has a thinner profile and better electrical and thermal performances because of no organic substrate and C4 bump.

InFO_PoP

InFO_oS leverages InFO technology and features higher density 2/2µm RDL line width/space to integrate multiple advanced logic chiplets for 5G networking application. It enables hybrid pad pitches on SoC with minimum 40µm I/O pitch, minimum 130µm C4 Cu bump pitch and > 2X reticle size InFO on >65 x 65mm substrates. Production ramped in Q4'17. Expect to integrate more chips as our customers continue to accelerate the adoption of chiplet packaging scheme for their next generation products.

InFO_oS
The Chronicle of InFO
  • 2019
    • Production Milestone
      More than 20 product tape-outs are in production or in development as of Aug. 2019
      TSMC has been shipping InFO in high volume since 2016
    • Customer Product
      N16 Network SoC
      • L/S < 2/2 µm
      • 1.5X reticle
    • Industry Publication
      ECTC 2019
      3D-MiM (MUST-in-MUST) Technology for Advanced System Integration
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      ECTC 2019
      Signal Integrity of Submicron InFO Heterogeneous Integration for High Performance Computing Applications
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  • 2018
    • Customer Product
      N16 Network SoC
      • L/S < 2/2 µm
      • 1X reticle
      N7 Mobile SoC
      • L/S < 10/10 µm
      • PoP height < 1 mm
      N7 Wearable SoC
      • L/S < 10/10 µm
      • PoP height < 0.9 mm
    • Industry Publication
      ECTC 2018
      A Novel Submicron Polymer Re-Distribution Layer Technology for Advanced InFO Packaging
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      ECTC 2018
      High Performance, High Density RDL for Advanced Packaging
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      ECTC 2018
      InFO_AiP Technology for High Performance and Compact 5G Millimeter Wave System Integration
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  • 2017
    • Production Milestone
      National Industrial Innovation Award
    • Customer Product
      N10 Mobile SoC
      • L/S < 10/10 µm
      • PoP height < 1 mm
    • Industry Publication
      IEDM 2017
      Advanced heterogeneous integration technology trend for cloud and edge
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      IRPS 2017
      CPI advancement in integrated fan-out (InFO) technology
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      ECTC 2017
      High Performance Chip-Partitioned Millimeter Wave Passive Devices on Smooth and Fine Pitch InFO RDL
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  • 2016
    • Customer Product
      N16 Mobile SoC
      • L/S < 10/10 µm
      • PoP height < 1 mm
    • Industry Publication
      IEDM 2016
      Ultra-low-resistance 3D InFO inductors for integrated voltage regulator applications
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      ECTC 2016
      Analysis and Comparison of Thermal Performance of Advanced Packaging Technologies for State-of-the-Art Mobile Applications
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      ECTC 2016
      InFO (Wafer Level Integrated Fan-Out) Technology
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      ECTC 2016
      Signal and Power Integrity Analysis on Integrated Fan-Out PoP (InFO_PoP) Technology for Next Generation Mobile Applications
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  • 2015
    • Industry Publication
      IEDM 2015
      High performance passive devices for millimeter wave system integration on integrated fan-out (InFO) wafer level packaging technology
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      IEEE 2015 International 3D Systems Integration Conference
      Power Saving and Noise Reduction of 28nm CMOS RF SystemIntegration Using Integrated Fan-Out Wafer Level Packaging (InFO-WLP) Technology
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  • 2013
    • Industry Publication
      IEDM 2013
      Array Antenna Integrated Fan-out Wafer Level Packaging (InFO-WLP) for Millimeter Wave System Applications
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      VLSI 2013
      High-Performance Inductors for Integrated Fan-Out Wafer Level Packaging (InFO-WLP)
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  • 2012
    • Industry Publication
      IEDM 2012
      High-Performance Integrated Fan-Out Wafer Level Packaging (InFO-WLP): Technology and System Integration
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