MIPS Technologies and TSMC form strategic alliance to deliver “hard“ versions of MIPS 32- and 64-bit processor cores; TSMC-optimized cores speed time-to-market and lower barriers to integrating “drop-in“ processor cores in SOC designs

MOUNTAIN VIEW, Calif. -- MIPS Technologies, Inc. (NASDAQ: MIPS) and Taiwan Semiconductor Manufacturing Company (NYSE: TSM) announced today a broad strategic alliance to develop the first-ever TSMC-optimized "hard cores" for MIPS-based* 32- and 64-bit processor cores, and to port future cores from MIPS Technologies to TSMC processes.

The agreement initially covers the development of TSMC process-specific MIPS32(tm) and MIPS64(tm) processor cores, which will be made available by MIPS Technologies to designers in fabless semiconductor firms, traditional semiconductor manufacturers and system OEMs on a per-use basis. This dramatically lowers the cost of entry for system-on-chip (SOC) designers.

These proven, pre-verified cores enable easy, "drop-in" processor implementation, greatly reducing time-to-market, development risk and development costs for high-performance system-on-chip designs. In addition, the jointly-defined hard cores will eliminate the time required to convert "soft" implementations into circuits with high performance, small die sizes and low power consumption.

Included in the agreement is the entire line-up of MIPS Technologies processor cores, including the MIPS32 4K* family of 32-bit processor cores, the MIPS64 5Kc(tm) 64-bit processor core and the very high-performance MIPS64 20Kc(tm) 64-bit processor core with MIPS-3D(tm) graphics acceleration (to be introduced at Embedded Processor Forum in June, 2000). Cores will be optimized for TSMC's advanced submicron CMOS fabrication processes for drop-in use in the designer's SOC design flow.

"The foundry model is changing the semiconductor manufacturing infrastructure in dramatic ways," said Jim Hines, principal analyst, GartnerGroup/Dataquest (San Jose, Calif.). "By the year 2005, foundry-manufactured products will account for 25 percent of worldwide semiconductor revenues, and this number will reach 40 to 50 percent by the end of the decade. This alliance recognizes the central role foundries will play in realizing system-level integration in silicon through the use of process-optimized, high-performance IP cores."

"The mantra of design re-use, lower design costs and faster time-to-market is now a reality for TSMC customers, at least when it comes to MIPS Technologies' 32- and 64-bit processor cores," said Tony Massimimi, chief of technology with Semico Research Corporation (Phoenix, Ariz.). "For MIPS Technologies, it is the first time they have delivered hard cores and it provides a significant new channel of opportunity to supply performance-optimized processor cores to fabless semiconductor makers and system OEMs. For TSMC, it provides valuable new processor IP to add to their growing portfolio of TSMC process-ready IP."

"This alliance with the world's largest dedicated semiconductor foundry puts the benefits of integrating the world's most advanced licensable processor IP into the hands of a large and fast growing segment of the SOC developer market," said Brian Knowles, vice-president of marketing at MIPS Technologies, Inc. "With TSMC foundry-optimized cores in the TSMC IP portfolio, MIPS Technologies has a manufacturing option that makes it possible for any TSMC customer to integrate our processor cores into their SOC designs quickly and cost-efficiently. This agreement simplifies SOC development by allowing designers to manage COT (Customer-Owned-Tooling) design flows, and IP sourcing through a common vendor. This will reduce costs and improve time-to-market for SOC developers."

Peyman Kazemkhani, IP Alliance program director at TSMC, said, "By adding MIPS Technologies' cores to our IP Alliance portfolio, we are providing our customers with powerful new building blocks for high-performance system-on-chip designs. We now offer an extensive line-up of third-party IP blocks, along with the world's lar