TSMC Implements Industry's First IP Tagging SystemVSIA Standard Tagging Scheme Tracks IP Usage in SOC designs

HSIN-CHU, Taiwan—March 20, 2001— Taiwan Semiconductor Manufacturing Company (NYSE: TSM) today became the first IC manufacturer to track the use of silicon intellectual property (IP) in chips manufactured in its fabs. In addition to pioneering the use of the Virtual Socket Interface Association (VSIA) standard for IP royalty tracking, TSMC will use the silicon IP data to provide detailed IP usage reports that will ultimately benefit both customers and silicon IP developers.

“The VSIA standard provides a simple method for identifying IP blocks within a design. By combining this with the robustness of our Total Order Management (TOM) system, we can do a lot with the small amount of information that is extracted from the chip,” said Silphy Ou, IP program manager at TSMC North America. “For example, we can help designers avoid costly mistakes by identifying outdated IP revisions before a mask is created. Similarly, we can give IP providers hard data about the manufacturing yields for their IP cores.”

TSMC’s IP tagging system uses the Virtual Component Identification Physical Tagging Standard Version 1.0 (VCID) standard developed by the VSIA. This IP tagging standard allows TSMC and its IP developers to automatically track the use of IP into the fabrication processes. This is accomplished by embedding IP tracking data into a dedicated, previously unused “layer” of the Graphical Design System II-Stream (GDSII-Stream) file that describes the chip design. TSMC then extracts the IP tagging data from that level as it scans the GDSII file in the mask-making process.

This methodology, which was originally developed by Artisan Components and offered as a standard to the VSIA, addresses the tracking of IP into the mask-making portion of the fabrication process. TSMC has worked closely with Artisan Components to create a scanning system to read the VCID data at the mask shop. Because TSMC has its own mask shops, it can interface these IP scanning systems into its larger manufacturing information infrastructure, further leveraging the IP information throughout the manufacturing process. This allows TSMC to extend the value of the IP tracking system to generate not just royalty reports, but extensive manufacturability reports as well. This has the potential to save both IP developers and customers valuable design and development time.

For example, by comparing the IP information in a GDS-II file with the targeted manufacturing process, TSMC’s TOM system can alert the customer if it thinks the silicon IP in a given design is not the right version – before a mask is created – thereby saving valuable time and expense.

“TSMC has taken a leadership role in the implementation of the VCID standard. Through our partnership with TSMC, we have developed a system that should be of immense value to all parties in the process, from the foundry to the IP developer and the designer,” said John Malecki, vice president of software engineering for Artisan Components.

Similarly, and with customer approval, the TOM system can use the IP tags to create robust IP tracking reports, including IP yield per chip, per wafer, or by fab. This information is useful to both IP developers and customers as SOC designs move to volume production.

“TSMC’s use of the VCID standard is an excellent example of the way IP tagging creates value within the IC manufacturing industry,” said Ian Mackintosh, Chairman of the IP Protection Development Working Group (DWG), of the VSIA. “We are excited to see this Standard implemented by a leading semiconductor foundry.”

The TSMC IP Tagging initiative will be a major focus at TSMC’s Technology Symposiums, which will be held on April 23rd in San Jose, Calif.; April 25th in Austin, Tex.; April 27th in Boston, Mass.; and Ap