HSIN-CHU, Taiwan, June 12, 2002 - Taiwan Semiconductor Manufacturing Company (TSMC) today announced that it has demonstrated a working device using a new transistor type that sets new performance records while enabling transistors that are about 10 times smaller than today’s most advanced production technology.
The breakthrough allows designers to create semiconductors with transistors—the smallest elements in a semiconductor design—as small as 9 nanometers, or 1/10,000th the width of a single human hair. At that size, designers could pack the computational power of a supercomputer into a space smaller than a fingernail.
The new transistor is a variation on today’s standard transistor, or field-effect transistor (FET). The new device is known as a FinFET because in three dimensions, it resembles the backfin of a fish.
TSMC has produced operational FinFETs at gate lengths as small as 35 nanometers. Initial testing of the P and N type transistors revealed new performance records and compliance with the current and leakage targets set by industry roadmaps for transistor of this size. The device will be presented in the Symposium on VLSI Technology, June 12, in Honolulu. Dr. Chenming Hu, TSMC’s Chief Technology Officer, says that the company has recently further improved the FinFET, creating gate lengths below 25 nanometers that achieved yet higher performance. TSMC researchers have also simulated the structure to operate within generally acceptable parameters at gate lengths as small as 9 nanometers.
Traditional transistors involve two components, one providing source and drain routes for the electrical current, and the other gating the current. Gating, which is similar to pressing a finger on a vein, creates the classic digital ones and zeros. As semiconductor technology is scaled to ever-smaller feature sizes, the laws of physics and electrical current begin to play havoc with traditional transistors. Gating becomes more difficult, leading to high current leakage and very hot semiconductors.
A FinFET overcomes these difficulties by providing a second gate so both sides of the source-and-drain structure are closed at the same time – in effect, pinching a vein rather than just applying pressure. Double-gating in this manner provides much better control and dramatically reduces leakage thus allowing the transistor size to be shrunk further and current to be increased.
Industry technologists and analysts have speculated for some time that there will come a point when the current workhorse manufacturing technology, complimentary metal oxide semiconductor (CMOS), will clash with insurmountable physics barriers. Many other technologies have been developed in anticipation of this. Generally speaking they are far more expensive and less manufacturable than CMOS and therefore not ideal for economic large-scale production of semiconductor devices.
By creating a new transistor with characteristics that allow the industry to extend the life of CMOS technology for about two decades, TSMC’s technologists have significantly expanded the outlook for the semiconductor industry.
TSMC is the world's largest dedicated semiconductor foundry, providing the industry's leading process technology and the foundry industry's largest portfolio of process-proven library, IP, design tools and reference flows. The company operates two advanced 300mm wafer fabs, six eight-inch fabs and one six-inch wafer fabs. TSMC also has substantial capacity commitments at two joint ventures fabs (Vanguard and SSMC) and at its wholly-owned subsidiary, WaferTech. In early 2001, TSMC became the first IC manufacturer to announce a 90 nanometer technology alignment program with its customers. TSMC's corporate headquarters are in Hs