MoSys Utilize TSMC 0.35 um Embedded DRAM Process to Set New Performance Standards

Hsin-Chu, Taiwan, September 30, 1998- MoSys, Inc. today announced the world's fastest embedded DRAM, whose cores are manufactured using proven and readily available Taiwan Semiconductor Manufacturing Company's (TSMC or the "Company") (NYSE: TSM) 0.35 um embedded DRAM process.The announcement also marked an expansion of the MoSys product line to include embedded memory.

Designed to meet the most aggressive performance requirements of graphics and communications applications, the new cores are manufactured using proven and readily available Taiwan Semiconductor Manufacturing Company's (TSMC) 0.35 um embedded DRAM process. These new cores are available exclusively from MoSys.

MoSys embedded DRAM cores are configurable from 4 to 32-Mbits of memory, in one Megabit increments and operate at clock speeds up to 133MHz. Based on MoSys' patented MultibankR technology, the new cores offer three clock random access cycle time, the fastest of any DRAM to date. The new cores provide an unprecedented 8.5-Gbytes/sec bandwidth, made possible by the wide 512-bit datapath, with sustained random access bandwidth exceeding 7-Gbytes/sec.

Due to their Multibank architecture, these cores are very power efficient, ideal for mobile application needs where power and space conservation are very important.

"During the past three years, MoSys' Multibank architecture has led the industry in stand-alone DRAM performance, now this technology is available to embedded applications," said Dr. Fu-Chieh Hsu, chairman and CEO. "We intend to take a leadership role in the emerging embedded DRAM and SRAM markets and have selected TSMC's EDRAM process because of its density, performance and production-proven high yields."

"We see a significant growth in embedded memory applications," said John Chern, Director of Embedded DRAM programs at TSMC. "Our partnership with MoSys allows us to offer the highest performance solutions to our customers."

The core's architecture is optimized for ease of application design and testability, supporting a non-multiplexed address bus, very simple command set and built-in redundancy and test paths.

Cores based on TSMC's 0.35um embedded DRAM process are available for design now, with higher performance 0.25 um cores under development scheduled for production in second quarter of 1999.

About TSMC

TSMC (ADS traded NYSE: TSM, also traded on TSE) is the world's largest dedicated integrated circuit (IC) foundry and offers a comprehensive set of IC fabrication processes, including processes to manufacture CMOS logic, mixed-mode, volatile and non-volatile memory and BiCMOS chips. Currently, TSMC operates two six-inch wafer fabs (Fab 1 and 2) and three eight-inch wafer fabs (Fab 3, 4, and 5), all located in Hsin-Chu, Taiwan. In mid-1998, TSMC announced that production wafers were being delivered from its first U.S foundry WaferTech, a joint venture with Altera, analog Devices and Integrated Silicon Solution, Inc. The company has broken ground in the new Tainan Park which will house Fabs 6 and 7. TSMC's corporate headquarters are in Taiwan. More information about TSMC is available through the World Wide Web at

About MoSys

MoSys, Inc. is the industry pioneer of high performance memory technologies such as multibanking, multibank caching, double data rate, fast cycle access, data streaming, terminated reduced-swing I/O switching, source-synchronous (wave-pipelining) data access, PLL-assisted clocking, ultra-fast charge sensing and ultra-fast memory cycle time. Many of these technologies are patented and incorporated in the Company's high performance Multibank DRAM, MCache, ultra-fast SGRAM and ultra-low power 1T-SRAM products and building blocks. More information about MoSys' products is available on http://www.mosy