Marvell’s Alaska? X 10 Gigabit Ethernet Transceiver Sets New Industry Standard with Unparallel Jitter Performance and the Lowest PowerThe Alaska X Device Features Rich Functionality for Backplane ApplicationsWhile Exceeding the Performance Requirements of 10 Gigabit Ethernet

Sunnyvale, CA. (September 11, 2001) – Marvell (NASDAQ: MRVL), a technology leader in the development of extreme broadband communications solutions, today announced the industry’s first 0.15 micron CMOS 10 Gigabit Ethernet transceiver, the Alaska? X device, which features the lowest power, superior jitter performance and smallest form factor solution on the market today.

10 Gigabit Ethernet transceiver components are critical in today's high-speed data communications and are the key building blocks for LAN, MAN and WAN networks. The enormous increase in network traffic demands higher bandwidth ports on switch and router systems, which, in turn, drives higher bandwidth requirements in the backplane for interconnection among the line cards. Marvell’s Alaska X device eases these bandwidth bottlenecks in next-generation systems by providing an aggregate bandwidth of 10 Gigabits per second (Gbps).

Marvell’s Alaska X transceiver is specifically designed for 10 Gigabit Ethernet applications utilizing both wave division multiplexing (WDM) and serial optical transmission. The Alaska X device is fully compliant to the latest draft of the IEEE 802.3ae specification to facilitate development of IEEE-based 10 Gigabit Ethernet systems. The Alaska X transceiver is optimized to seamlessly interface with the latest generations of optical transponders, such as the XENPAK Multi Source Agreement (MSA) module. The combination of the Alaska X device and the MSA module enables OEMs to build cost-effective, smaller and higher performance systems, accelerating the deployment of 10 Gigabit Ethernet.

Marvell’s Alaska X transceiver enables system vendors to provide low cost, low power and highly dense optical connections for fiber-based backplanes and chassis-to-chassis communications using parallel optical transceiver modules and ribbon fiber cables. The Alaska X device also features flexible clocking modes and transmit pre-emphasis to support high-speed copper backplane applications. The programmable pre-emphasis allows the use of longer copper traces in excess of 40 inches with multiple connectors on generic low cost PCB materials such as FR4, lowering the overall system cost while providing system vendors with a forward migration path to higher throughput on existing backplanes.

The Alaska X transceiver uses a 3.125 Gigabit Serializer/ Deserializer (SERDES) IP core and input/output buffers such as high-speed 3.125 Gbps drivers and HSTL buffers from Marvell’s vast library of mixed-signal IP cores. Marvell has developed custom solutions leveraging such IP cores to build Application Specific Integrated Circuits (ASIC) with strategic partners. The Company’s unique low power 3.125 Gigabit IP core is based on very high performance Phase Lock Loop (PLL) technology. The combination of low power dissipation, superior jitter performance and high noise immunity allows for the integration of large and complex system solutions on a single device. Marvell’s Alaska X transceiver leverages four generations of SERDES technology from the industry-leading Alaska Gigabit PHY products, which are currently in high volume production.

"By cutting the power to less than half of current solutions, while delivering unparalleled jitter performance, Marvell’s Alaska X device sets a new industry standard for 10 Gigabit transceivers and, once again, demonstrates our leadership in networking PHY technology," stated Gary Smerdon, Marvell’s Vice President of Marketing for the Communications Business Group. “With the introduction of our Alaska X chip, Marvell enables our customers to significantly increase port densities and accelerate development of cost-effective high performance 10 Gigabit systems.”

Marvell’s Alaska X is manufactured using Taiwan Semiconductor Manufacturing Company’s (TSMC) 0.15 micron CMOS process