Altera and TSMC Deliver Industry's First 0.13-Micron All-Copper Interconnect PLDIndustry Leaders Cap Year of Innovation with Another Process Technology Breakthrough

San Jose, Calif., and Hsin Chu, Taiwan, January 7, 2002 -- Altera Corporation (Nasdaq: ALTR) and Taiwan Semiconductor Manufacturing Company (TSMC) today extended their industry leadership by delivering the first programmable logic device (PLD) built on a 0.13-micron semiconductor fabrication process using copper for all layers of metal interconnect. Developed in partnership with TSMC, the worlds largest independent semiconductor foundry, Alteras APEX II EP2A70 device is built on the most advanced semiconductor process technology available.

“Today’s announcement caps a banner year of process technology breakthroughs for Altera and TSMC,” said Francois Gregoire, vice president of technology development at Altera. “Earlier this year, at the 0.15-micron process step, Altera introduced the APEX 20KC family, the world’s first PLD family using all layer copper interconnect. In addition, we introduced the Mercury? device, the first programmable ASSP built on that same technology.”

Copper interconnect layers in integrated circuits (ICs) offer lower electrical resistance over traditional aluminum/tungsten metal layers, reducing interconnect delays up to 40 percent and improving performance. Migration to a 0.13-micron semiconductor fabrication process combined with all-layer copper interconnects further enhances the benefits by reducing die sizes, yielding more dice per wafer and increasing device performance.

“Significant industry milestones such as these underscore the value of our partnership with Altera,” said Dr. Kenneth Kin, senior vice president at TSMC worldwide marketing and sales. “TSMC is committed to staying the course of collaborative process development, enabling the continued innovation that is expected of industry leaders. At the end of 2001, TSMC delivered 33 fully functional 0.13-micron devices to its customers and acknowledged more than 60 production tapeouts. In addition, we recorded nearly 100 Cybershuttle tapeouts at 0.13-micron, indicating a growing demand for advanced manufacturing processes.”

About APEX II Devices

The APEX II devices are Altera’s high-performance, high-density PLD family for system-on-a-programmable-chip (SOPC) applications. Building on the successful APEX architecture, the APEX II device family marks a breakthrough in capability and system performance that place programmable logic directly in the datapath of high-performance communication applications. APEX II devices support I/O interfaces such as RapidIO, Utopia IV, POS-PHY Level 4, HyperTransport and Flexbus. Features include dedicated serialization/deserialization (SERDES) and Clock data-synchronization (CDS) circuitry that make 1 Gbps differential signaling possible for high-speed I/O capabilities, needed in high performance communications applications. The APEX II architecture also provides up to 1.1 Mbits of internal memory creating an excellent solution for memory-intensive applications, such as packet processing. Additional details on the APEX II device family can be found at

About Altera

Altera Corporation (Nasdaq:ALTR) is the worlds pioneer of system-on-a-programmable-chip (SOPC) solutions. Combining programmable logic technology with software tools, intellectual property, and technical services, Altera provides high-value programmable solutions to approximately 14,000 customers worldwide. More information is available at

About TSMC

TSMC is the world's largest dedicated semiconductor foundry, providing the industry's leading process technology and the foundry industry’ largest portfolio of process-proven library, IP, design tools and reference flows. The company has one advanced 300mm wafer fab in production and one under construction, in addition to seven eight-inch fabs and two six-inch wa