Hsinchu, Taiwan, September 4, 1996 -- Taiwan Semiconductor Manufacturing Company (TSMC) today announced that the company has joined the VSI (Virtual Socket Interface) Alliance to accelerate the system-chip market growth.
Representatives from a group of more than 35 industry leading electronics firms jointly held a press conference on September 3, 1996, in San Jose, to announce the formation of VSI Alliance. The alliance has set forth a crisp vision for creating intra- and inter-company worldwide intellectual property (IP) networks. These networks will facilitate the rapid identification, evaluation, exchange, and design-in of IP in the form of system-level macros (SLMs), cores or megacells.
A system chip is a term used to describe highly integrated devices, otherwise labeled systems on silicon, system-on-a-chip, and what Dataquest refers to as System Level Integration (SLI) devices. Dataquest defines SLI devices as greater than 100k gates with at least one programmable core and memory. Clearly, the trend is rapidly moving toward multi-million gate devices with greater than 80% content determined by pre-packaged hardware and software IP, in the form of cores or SLMs.
The philosophy behind the Virtual Socket Interface is much like standardized physical components which are rapidly mixed and matched today on a printed circuit board. IP in standardized "virtual component" forms will be rapidly mixed and matched into system chips. To facilitate mix and match, VSI will include "open" interface standards, which will allow virtual components to fit quickly into "virtual sockets", at both functional level (e.g., interface protocols) and the physical level (e.g., clock, test and power structures). In addition, the VSI will include IP design data standards, that will be based on the de facto and open formats supported by all Alliance members. This will allow IP providers to productize and maintain a uniform set of IP deliverables, rather than support numerous sets of deliverables required for the many unique customer design flows.
It is envisioned that within a few years system-chip designers will access a web-based network to rapidly identify IP sources; evaluate alternatives for performance, cost, quality, and risk; and then quickly complete the appropriate internal or external transaction to receive all required information for design-in of the chosen IP. In aggressive pursuit of the vision, the alliance will employ a rapid prototyping approach to the development of de facto standards that combines the practical design experience of semiconductor vendors, system companies, independent IP providers, and electronic design automation (EDA) vendors.
The inaugural members of the VSI Alliance include semiconductor vendors: TSMC, TI, Toshiba, Fujitsu, NEC, Hitachi, National Semiconductor, Altera, Cirrus Logic; EDA vendors: Cadence, Synopsys, Mentor Graphics, Viewlogic; library vendors: COMPASS, ASPEC; system companies: Sony, SUN, Alcatel; and IP providers: ARM, CompCore, DSP; etc.
TSMC is the only Taiwanese company that was in the inaugural members. Dr. Quincy Lin, vice president of TSMC, stated "The ability to mix and match IP blocks will greatly reduce the design effort and time of complex chips. It is a monumental move for the semiconductor industry. We support this move and will be happy to provide silicon realization for the IP owners and their users."
The VSI Alliance is an open organization that includes representatives from all segments of the system-chip industry. Membership is open to any corporation willing to support and use the open standards proposed and ratified by the VSI Alliance. For more information, please visit the VSI Alliance web site at http://www.ip-net.org