MOUNTAIN VIEW, Calif., May 29, 2001 -- Synopsys, Inc. (Nasdaq: SNPS) today announced that TSMC will support Synopsys’ award winning TetraMAXR automatic test pattern generation (ATPG) solution in its Reference Flow for all process technologies between 0.25 micron and 0.13 micron. In addition, TSMC has licensed TetraMAX for use in its Design Services Division (DSD), which provides chip implementation services to TSMC’s customers and technical support to third-party design centers. This announcement demonstrates continued adoption of Synopsys test products by leading foundry and ASIC companies worldwide, and underscores the industry’s recognition that advanced design-for-test (DFT) strategies are key to the successful manufacture of high quality, complex ICs.
According to Fred Wang, director of the Design Service Division of TSMC, “TetraMAX clearly performed to expectations in our technical evaluation. We developed the automatic test pattern generation module in the TSMC Reference Flow by implementing a scan-based test methodology using TetraMAX as the core tool. TSMC Reference Flow users will benefit by saving tester time as a result of the vector compaction and higher test coverage over very large chips. Ultimately, this will enable faster development of high quality, manufacturable devices.”
As process geometries continue to shrink, allowing more transistors to be placed on silicon, the resulting devices’ increased complexity may make them more expensive to test than to manufacture. A strong DFT methodology implemented early in the design cycle will be mandatory to enable high quality, low cost testing in the manufacturing stage, avoiding cost overruns and time-to-market impacts.
“It is clear that TSMC recognizes the benefits that our test methodology provides to the industry both today and in the future,” said Bijan Kiani, vice president of marketing for Synopsys’ Nanometer Analysis and Test Business Unit. “Designers who consider test up front in the design cycle will experience a reduction in testing cost at the back end of the semiconductor process. Right now, there is a real cost and time-to-market advantage to be gained by laying a strong DFT foundation into the design of next generation electronic devices.”
Synopsys’ Versatile Test Solutions
Synopsys, the leading supplier of IC test automation solutions, offers a complete line of integrated products and services to meet the most demanding manufacturing test requirements.
The company’s award winning design-for-test offering includes the advanced TetraMAX ATPG and DFT Compiler tools. TetraMAX complements scan-based test methodologies by providing industry-leading ATPG performance, capacity and ease of use. DFT Compiler incorporates the latest generation of Synopsys’ patented 1-Pass test synthesis technology and enables design teams to efficiently meet their DFT closure goals. Complementing these products, Synopsys offers comprehensive test services delivered by a world-class team of DFT experts.
Synopsys, Inc. (Nasdaq: SNPS), headquartered in Mountain View, California, creates leading electronic design automation (EDA) tools for the global electronics market. The company delivers advanced design technologies and solutions to developers of complex integrated circuits, electronic systems, and systems on a chip. Synopsys also provides consulting and support services to simplify the overall IC design process and accelerate time to market for its customers. Visit Synopsys at http://www.synopsys.com. Synopsys is a registered trademark of Synopsys, Inc. TetraMAX is a registered trademark of Synopsys, Inc. All other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.