HSIN-CHU, Taiwan, September 15, 2000 - Taiwan Semiconductor Manufacturing Company (NYSE: TSM), the world’s largest dedicated semiconductor foundry, today announced that it will tape out at least seven customer products to its industry-leading 0.13-micron process in September, more than a year ahead of the SIA roadmap. First tape outs have already occurred. The volume of tape outs is expected to be well ahead of the industry at this geometry. Products taping out at this line width span the range of applications, including multiple CPUs, SRAMs and devices for communications systems and cell phones. The tape outs are expected to result in first silicon in the fourth quarter of this year.
Not only is TSMC’s industry-leading 0.13 micron process the first to tape out customer products, it’s also the first to tape out products using multiple process variations. TSMC’s 0.13-micron core (CL013G), low power(CL013LP) and high performance(CL013LV) technologies are each designed to enable optimum performance for specific application areas. All three versions are being used in tape outs this month.
“With this announcement, TSMC expects to definitively make its mark as the technology leader in the foundry industry, and one of the pioneering group in the IC industry as a whole,” said Dr. FC Tseng, president of TSMC. “This is a testament both to the hard work of our many leading researchers and engineers, and to the excellent feedback and collaborative efforts of many key customers.”
The announcement was made at a special press conference in London prior to the company’s annual European Technology Symposium tour, which includes full-day customer presentations in London, Munich and Tel-Aviv.
About TSMC’s 0.13-Micron Process
TSMC’s advanced 0.13-micron process delivers the foundry industry’s most advanced technology for high-performance, high-density system-on-chip (SOC) designs. The process features a complete technology family, including core, high-performance, ultra-high-speed and low-power offerings. It is ideal for high-performance, high-bandwidth applications, wireless Bluetooth RF applications, and ultra-high-performance CPU applications.
Built to TSMC’s industry-leading standards for quality and reliability, the 0.13-micron process provides a 72 percent shrink versus TSMC’s popular 0.18-micron technology, enabling more logic density per square millimeter for system-level integration with the highest possible performance. The process supports all TSMC technology offerings, including logic, embedded flash, embedded DRAM, and mixed signal technologies.
Primary features of the 0.13-micron process include a 1.0-volt core, 2.5 or 3.3-volt I/Os, a gate length of 0.08 micron, and a ring oscillator performance rating of 14 picoseconds/gate for the CLO13LV (high-performance) process. The embedded 6T SRAM cell size is 2.43um2, representing a 52 percent shrink versus TSMC’s 0.18-micron process.
TSMC’s 0.13-micron process delivers industry-leading performance, density and reliability on the industry’s widest array of technology platforms for advanced system-on-chip design. These platforms include:
Core (CL013G): Easy migration, process integration platform for computing, communications, and high-density programmable logic High Performance (CL013LV): Low voltage, high performance. High interest from early adopters in performance-hungry applications such as graphics, networking, high-speed SRAM Low Power (CL013LP): Low power, excellent for portable and wireless applications including cell phones, PDA devices, digital consumer products, and more. Ultra-high-speed (CL013HS): This version is also available for microprocessors and other specialized applications. TSMC’s 0.13-micron process will be supported by libraries from Artisan Compo