Science-Based Industrial Park, Hsin-Chu, Taiwan, July 12, 2001 — Taiwan Semiconductor Manufacturing Company Ltd. (NYSE: TSM), the world’s leading pure-play foundry, is the first to successfully implement RosettaNet’s Work-In-Process (WIP) Partner Interface Process? (PIP?) 3D8 standard between TSMC, Motorola, Inc., and Advanced Semiconductor Engineering, Inc. (NYSE: ASX). The RosettaNet PIP 3D8 standard defines an environment for automatically tracking work between a manufacturing facility and its customers or partners.
By connecting TSMC to a leading upstream integrated device manufacturer, and a leading downstream wafer probing, die assembly and final test service provider through the RosettaNet PIP interface, TSMC provides the first foundry-based supply chain management system to encompass all three major functions in the electronics manufacturing supply chain.
“The RosettaNet 3D8 standard allows us to raise the work-in process visibility of wafers and die. This shortens IC manufacturing lead-time and improves business planning for faster time-to-volume,” said Dr. Quincy Lin, CIO and senior vice president of TSMC. “By linking the foundry's information with back-end wafer probing, die assembly and final test information, we’re providing an environment that can significantly boost manufacturing efficiencies, setting new milestones and further improving our leadership position in the foundry industry.”
“This early implementation of the RosettaNet 3D8 standard between three major partners in the IC manufacturing process proves the value of a standards-based supply chain management approach,” said Ron Waters, director of worldwide wafer external technology, Motorola SPS. “The ease with which this system was put in place is a testament to the quality of work put forth by the members of RosettaNet’s Semiconductor Manufacturing Board.”
“Our RosettaNet collaboration with TSMC provides an integrated view of the packaging and test work-in-progress. As a result, our mutual customers have improved visibility of the complete semiconductor manufacturing, packaging and test activities,” said Dr. Sueming Shen, vice president of MIS at ASE. “This clearly benefits our customers by helping them match supply and demand and increasing their competitiveness. ASE also benefits through better capacity allocation and materials management, resulting in shorter lead times for our customers.”
RosettaNet’s PIP 3D8 provides a format and protocol for WIP data exchange and was developed and approved by members of the RosettaNet Focus Process Team (FPT), which is comprised of RosettaNet Semiconductor Manufacturing Board representatives. TSMC is the lead partner in the Manufacturing FPT and is working collaboratively on other RosettaNet PIP standards projects aimed at providing more efficient services and transparent logistics information to customers.
RosettaNet is an independent, non-profit consortium dedicated to the collaborative development and rapid deployment of open Internet-based business standards that align processes within the global high-technology trading network. More than 400 companies representing over $1 trillion in annual information technology, electronic components and semiconductor manufacturing revenues currently participate in RosettaNet’s standards development, strategy and implementation activities. A complete list of member companies and more information on RosettaNet is available at www.rosettanet.org.
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