SAN JOSE, Calif.--(BUSINESS WIRE)--March 8, 2001--Cadence Design Systems, Inc. (NYSE:CDN - news), the world's leading supplier of electronic design products and services, and Taiwan Semiconductor Manufacturing Company (TSMC), he world's largest dedicated semiconductor foundry, today announced they have collaborated to jointly develop, validate and distribute Process Design Kits (PDKs) specifically for TSMC's industry-leading 0.18- and 0.25-micron mixed mode/RF and logic process technologies. The new PDKs are expected to slash weeks off design start-up time, boost designer productivity, improve design quality, and ultimately accelerate time-to-volume.
The PDKs are the outcome of collaboration by the two industry leaders to help their customers get products to market quicker. A separate element of the agreement calls for development of a similar PDK for TSMC's advanced 0.13-micron process technology. All of the PDKs exemplify Cadence?ongoing strategy to provide complete design solutions to customers worldwide.
``In the highly competitive communications market, time-to-volume is essential,'' said Michael Pawlik, TSMC's VP of Corporate Marketing. ``Anything a designer can have to accelerate design time is of great value. A PDK that allows the designer to target the design directly to our production silicon provides that advantage. Our partnership with Cadence is built on the years of experience that both companies have working in this area.''
Cadence and TSMC customers now have a complete, off-the-shelf, proven design kit specifically tailored to TSMC processes. The kits also provide reliable access to the trusted Cadence design flow and methodology.
``As electronic design and the supply chain become more complex, our customers are looking to us to find new ways to improve their productivity,'' said Jim Hogan, senior VP for Cadence. ``We anticipate that many of our large, vertically integrated IDM [integrated device manufacturer] customers will continue to out-source silicon production to dedicated foundries like TSMC. This is why Cadence and TSMC are exploring several avenues to tighten up the supply chain in the COT [customer owned tooling] business model for analog, digital, and mixed-signal IC.''
The Customer Challenge
Customers are continually driven to get their designs out the door faster. Gain Technology, a provider of IC design and development services to semiconductor and OEMs worldwide, is one of several companies that have already achieved quicker tape-outs with TSMC's PDKs.
``Developing our own design kit would have taken four full-time people three months to complete,'' said Bob Burns, CAD manager for Gain's Data Communications Division. ``We didn't have available resources or a three-month window to work with. The TSMC PDK gave us exactly the competitive edge we needed.''
The TSMC PDK contains all of the data necessary for customers to immediately start their design using Cadence Custom IC design solution. The PDK supports current versions of Cadence Analog Design Environment, Schematic Composer, Spectre(TM) circuit simulator, Virtuoso Custom Designer, and Diva(TM) physical verification, with Assura(TM) physical verification support available later in 2001. PDKs for select TSMC 0.25- and 0.18-micron processes are available now from the TSMC customer Web site at http://online.tsmc.com. A 0.13-micron PDK will follow later in the year.
TSMC is the world's largest dedicated semiconductor foundry, providing the industry's leading process technology, library and IP options and other leading-edge foundry services. TSMC operates two six-inch wafer fabs and six eight-inch wafer fabs. The Company also has substantial capacity commitments at two joint ventures fabs (Vanguard and SSMC) and WaferTech. In 2000, TSMC pr