TSMC Fabricates MoSys 1T-SRAM? Core in Standard Logic ProcessTSMC Education and Culture Foundation Exclusively Sponsors the Jose Carreras 1999 Taipei Concert

San Jose, CA October 11, 1999 - Taiwan Semiconductor Manufacturing Company (NYSE: TSM) today announced that it has fabricated MoSys, Inc.'s 2 Megabit, 1T-SRAM core on TSMC's 0.25-micron logic process. MoSys' single-transistor-based RAM implementation is expected to provide TSMC customers with a fast, high-density memory capability that is fully process-compatible with existing logic process IP blocks, including logic libraries and traditional six-transistor SRAM memories.

"We are excited to be the first foundry to work with MoSys in verifying this very dense memory architecture in a standard logic process," said Roger Fisher, senior director of corporate marketing at TSMC. "This MoSys 1T-SRAM offering should help our customers implement economic system-on-chip products incorporating multi-megabits of high-speed RAM."

The availability of 1T-SRAM technology on a standard logic process allows the integration of three times as much high-performance SRAM as compared to traditional six-transistor SRAM, with dramatic savings in power consumption, according to MoSys. The core is designed to be integrated with high-performance RISC, DSP and mixed-signal interfaces for system-on-chip designs.

About 1T-SRAM from MoSys

MoSys' 1T-SRAM technology uses a single transistor cell to achieve its higher density while maintaining the refresh-free interface and low latency random memory access cycle time associated with traditional six-transistor SRAM cells. It offers an alternative to traditional 6-T SRAMs and to embedded DRAMs. According to MoSys, 1T-SRAM memories can be fabricated using either pure logic or embedded DRAM processes.

Availability

The MoSys 1T-SRAM cores are available for license from MoSys now. About TSMC TSMC (ADS traded NYSE: TSM, also traded on TSE) is the world's largest dedicated integrated circuit (IC) foundry and offers a comprehensive set of IC fabrication processes, including processes to manufacture CMOS logic, mixed-mode, volatile and non-volatile memory and BiCMOS chips. Currently, TSMC operates two six-inch wafer fabs (Fab 1 and 2) and three eight-inch wafer fabs (Fab 3, 4, and 5) all located in Hsin-Chu, Taiwan.

In mid-1998, TSMC announced that production wafers were being delivered from its first U.S. foundry, WaferTech, a joint venture with Altera, Analog Devices and Integrated Silicon Solutions, Inc. The company has broken ground in the new Tainan Park, which will house Fabs 6 and 7 and recently announced its participation in a $1.2 billion joint venture fab with Philips Semiconductor which is scheduled to open in Singapore in 2000. TSMC's corporate headquarters are in Taiwan. More information about TSMC is available through the World Wide Web at http://www.tsmc.com.tw.