TSMC's 5nm Fin Field-Effect Transistor (FinFET) process technology is optimized for mobile as well as high performance computing applications.
TSMC's 5nm process technology is TSMC's second available Extreme Ultraviolet lithography (EUV) process technology, and is TSMC's newest offering with highest transistor density. It packs more computing power into less space. The smaller chip design also lowers power consumption, an important metric to AI and 5G applications from edge to center for longer battery life and lower operating cost.
Upon entering risk production in March 2019, this world-leading technology received multiple customer product tape-outs, with both mobile and high performance computing products. In April 2019, we delivered industry's first complete design infrastructure for 5nm process technology.
The momentum at 5nm node was carried on well into volume production which started in the first half of 2020. Compared to 7nm FinFET (N7) technology, N5 technology offers about 15% speed improvement or about 30% reduction in power consumption.
Meanwhile, TSMC plans to announce N5P technology in the next N5 revision in the second quarter of 2020. By maintaining the same design rules, N5P offers a seamless migration path for customers to take advantage of the benefits the improved N5P technology has to offer without requiring significant engineering resource investment or longer design cycle time. The N5P technology provides roughly 20% speed improvement or about 40% reduction in power consumption compared with the 7nm process technology.