TSMC integrated turnkey service provides end-to-end technical and logistical customized 3DPackage solutions. With TSMC silicon SoC technology, 3D technologies and collaborating with IP, substrate and memory suppliers, enable customers to create the best solutions with heterogeneous integration, die partitioning, 2.5D/3D die stacking, and memory Integration.

The integrated turnkey service provides customer quick solution for CPI (Chip- Packaging- Integration) issues likely incurred during packaging manufacturing as a result of CTE (Coefficient-of-Thermal-Expansion) mismatch between different packaging materials and components. The CPI became crucial after package size continuously scaling down and expected being more challenging in heterogeneous packaging driven by high computing density requirements.

In addition to advance packaging technology development, TSMC has been endeavored in CPI since started offering customers bump service in year 2000. By synergy of SoC (System-On-Chip) and packaging manufacturing experience, TSMC can assist customers optimizing product design via in-house modeling service and customizing Test Vehicle (“TV”) to early assess the manufacturability and reliability performance of designed packaging solution.

For better CPI coverage and controllability, TSMC is strengthening the collaboration with substrate, memory and materials suppliers in recent years, via joint development projects or intense engineering interactions. Built on 3DFabric technologies, TSMC’s integrated turnkey service aims to provide customer total packaging solution to further boost customer products’ time-to-volume and time-to-market.


Modeling Service

TSMC’s packaging modeling service provides customized solution to accommodate various product requirements. Customer can avert CPI (Chip-Package-Interaction) reliability risks of BE 3D (CoWoS and InFO)...


Substrate Design Service

The substrate design service provides layout and DFM (Design for Manufacturing) with substrate suppliers. TSMC in-house modeling service offers layout optimization from material selection to SI/PI performance...