On top of the TSMC EDA Tool Certification Program, TSMC collaborates with its ecosystem partners to address the design challenges of new technologies and bring customers solid solutions for design enablement and turnaround time improvement.

The latest design reference flows are:

Providing comprehensive technology support to address latest GAA design challenges in HPC, mobile and full custom designs. The N2P Mobile and HPC design reference flows enabled synthesis, placement and routing taking full advantage of TSMC GAA methodology for different design applications. The N2P Custom Design Reference Flow offers frontend-to-backend full custom transistor-level design and verification.

The reference flow aims to use modulization concept realizing 3DIC designs with TSMC 3DFabric^® advanced packaging service. Customers can easily implement their innovative 3DIC designs with the set of fundamental building blocks. The required EDA solutions for 3DIC implementation, analysis and verification are also in place supporting advanced packaging design enablement through the joint efforts in certification, and recapped in this reference flow.

Maximizing the reuse of the analog IP blocks. Conventional analog design porting requires manual migration and verification on each design step with tedious and time-consuming operations. To efficiently reuse the proven analog blocks across TSMC technologies, customers can benefit from Analog Design Migration Reference Flow with accelerated processes in schematics migration, layout reuse, and circuit optimization.

Leveraging from Analog Design Migration capabilities, the RF Design Migration flow enhances the productivity of migrating the RF designs (N16 to N6RF+) to enjoy the PPA gain in TSMC advanced nodes. The customers can benefit from the RF Migration Flow with accelerated processes in custom passive synthesis & analysis, schematics migration, functional simulations, layout reuse, circuit optimization.

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To better serve our customers with a robust design ecosystem and enable customers’ design with TSMC latest technology, TSMC has been conducting full-line EDA Tool Certification Program with major partners including Ansys, Cadence, Siemens EDA and Synopsys. The core of the certification program covers the tool solutions to the latest advanced process technology (N2P) and 3DFabric offering.

The advanced process node certifications cover several silicon-centric categories, including physical implementations (APR for High Density/HPC, Custom Design), timing and power signoffs (STA, Transistor-level STA), electromigration and IR Drop (Gate-level and transistor-level EMIR), physical verifications (DRC, LVS, Dummy Fill), RC extractions (RC) and simulators.