Excellent power, Performance and Area (PPA); proven process maturity

Smartphone applications are major drivers of silicon technology advancements. TSMC’s 7nm (N7) platform technology delivers up to a 30% speed improvement, a 55% power saving, and a 3 times logic density improvement over 16nm technology (N16). It has been widely adopted for smartphone, HPC, automotive, advanced digital consumer electronics and other applications. The N7 platform set TSMC records for defect density reduction and production volume ramp rate.

EUV process improves logic density; provides backward compatibility

Extreme ultra-violet (EUV) lithography requires fewer masking layers and offers better process variation control. The 6nm (N6) technology utilizes additional EUV layers to improve process simplicity, shorter cycle times, and improve productivity. N6 provides improvements in power, performance, and density over N7 with similar defect density thanks to a smaller standard cell library. Through lithography process optimization, optical proximity correction (OPC), and etch co-optimization, N6 provides backward-compatible design rules, device models, and IP as N7, making the migration from N7 to N6 very straightforward. It also shares the same design flow and EDA tool availability.

Designers can adopt N6 while sustaining their N7 investments. In re-tape-out (RTO), the die size remains the same as N7, but yield improves because of a reduced number of masks and a simplified process. New tape-outs (NTO) yield improvements result from both die size reduction, denser standard cells, and EUV mask reduction. The N6 node has been in volume production since 2020. N6 has been in volume production since 2020 and has been adopted for mainstream 5G smartphones, solid-state drives (SSD), programmable logic devices (PLDs), networking, and gaming products.