Excellent power, Performance and Area (PPA); proven process maturity

Smartphone applications have been one of the main drivers of silicon technology advancement. TSMC 7nm (N7) platform technology delivers up to 30% speed improvement, 55% of power saving and three times logic density improvement over 16nm technology (N16). It has been widely adopted for smartphone, HPC, automotive, advanced digital consumer electronics and other applications. The N7 platform set TSMC records for defect density reduction and production volume ramp rate.

EUV process for improved logic density with backward compatibility

EUV (extreme ultra-violet) process delivers fewer masking layers and better process variation control. TSMC N6 technology features more EUV layers for process simplicity, shorter cycle time and improved productivity gains. Together with smaller standard cell libraries, N6 provides additional power, performance and density benefit with defect density similar to N7.

Through lithography process, optical proximity correction (OPC) and etch optimization, N6 offers backward compatible design rules, SPICE model and IP with N7, which makes migration from N7 to N6 very straightforward. It also has the same design flow and EDA readiness to adopt N6 while sustaining N7 investments. In re-tapeout (RTO) mode, die size remains the same as N7, but yield improves with reduced masking layers and a simplified process. In new-tapeout (NTO) mode, yield improvement comes from both die size reduction, denser standard cells and reduced masking layers through EUV. N6 has been in volume production since 2nd half of 2020 and has been adopted in mainstream 5G smartphones, solid state drivers (SSD), PLD, networking and gaming products.