TSMC has successfully delivered N3P technology, which has achieved yield performance comparable to N3E. Its flexibility can easily enhance product competitiveness.

TSMC’s N3X technology was introduced in 2023. We have validated the speed benefits and minor leakage trade-offs in silicon. N3X is 5% faster under the same area using a 2-fin standard cell than N3P. If a design currently uses TSMC’s 3-2 fin FinFlex standard cell to meet speed targets, customers can leverage N3X to achieve the same speed and reduce area by 9% by using 2-fin standard cells instead. N3X also improves power efficiency by lowering the supply voltage. Customers have the flexibility to use these methods to enhance the competitiveness of their product designs.

The 5nm (N5) node is optimized for both smartphones and HPC applications. It provides innovative scaling features to enhance logic, static random-access memory (SRAM), and analog density. N5 delivers substantially improved power, performance, and density over N7. The node offers flexibility to enhance the competitiveness of product designs. Extreme ultra-violet (EUV) lithography makes N5 mask layers and process complexity more manageable.

N5P is the performance-enhanced version of N5. It delivers power and performance improvement with backward compatible design rules for easy IP porting. SRAM cells provide a further performance boost for frequency increase and power saving.

The 4nm (N4) technology is an enhanced version of 5nm (N5) technology, with density improvement. It started volume production in 2022.

To further enhance the N5 family’s performance and power, TSMC introduced N4P and N4X, targeting the next wave of 5nm products.

N4P provides an 11% performance boost over N5 and entered volume production in 2023. N4X is the first TSMC’s “X” line of extreme-performance semiconductor technologies. It delivers a 6% speed gain over N4P, with a moderate leakage trade-off. N4X entered volume production in 2024. N4C provides additional compact “knobs” for a better cost structure and entered risk production in the first half of 2025.

The N4, N4P, N4C, and N4X are design rules compatible with 5nm technology for easy design migration.

Smartphone applications are one of the main forces driving silicon technology advances. TSMC’s 7nm (N7) technology delivers up to a 30% speed improvement, a 55% power saving, and 3 times the logic density, compared to 16nm (N16). N7 technology has been widely adopted for high-performance computing (HPC), smartphones, automotive, and other applications. The extreme ultra-violet (EUV) lithography improves logic density and backward compatibility.

The N7+ node was TSMC’s first EUV process to enter volume production. EUV simplifies the process flow by requiring fewer masking layers and providing better process variation control.

The 6nm (N6) technology utilizes additional EUV layers to improve process simplicity, shorten cycle times, and improve productivity. N6 provides improvements in power, performance, and density over N7 with similar defect density thanks to a smaller standard cell library.

Through lithography process optimization, optical proximity correction (OPC), and etch co-optimization, N6 provides backward-compatible design rules, device models, and IP as N7, making the migration from N7 to N6 very straightforward. It also shares the same design flow and EDA tool availability.

Designers can adopt N6 while sustaining their N7 investments. In re-tape-out (RTO), the die size remains the same as N7, but yield improves because of a reduced number of masks and a simplified process. New tape-outs (NTO) yield improvements result from both die size reduction, denser standard cells, and EUV mask reduction. The N6 node has been in volume production since 2020. Both N7 and N6 are widely adopted in HPC devices.

Power integrity and delivery become a more significant part of the performance equation. On-die capacitance density becomes increasingly important due to its proximity to active circuits and fast response time. TSMC has developed the various capacitors to address this challenge. The most advanced UHPMiM provides high effective capacitance and SHPMiM addressed cost-sensitive products, respectively.